Revision as of 19:50, 2 July 2013

Register Map

Read registers
Module Address	Register Address	Name	Data
0	MUX_IN	Bit 7..0: multiplexer address
'T'	1	STATE_IN	Bit 7..0: input value

Write registers
Module Address	Register Address	Name	Data
0	MUX_OUT	Bit 7..0: multiplexer address
'T'	1	Debounce	Bit 7..0: input value

@@ Line 1: / Line 1: @@
 = Register Map =
 {| border="1" class="wikitable"
 |+ Read registers
 ! Module Address !!  Register Address !! Name !! Data
+|-
+! 0
+| MUX_IN || Bit 7..0: multiplexer address
 |-
 ! 'T'
-| 0 || MUX_IN || Bit 7..0: multiplexer address
+| 1 || STATE_IN || Bit 7..0: input value
+|}
+{| border="1" class="wikitable"
+|+ Write registers
+! Module Address !!  Register Address !! Name !! Data
+|-
+! 0
+| MUX_OUT || Bit 7..0: multiplexer address
 |-
 ! 'T'
-| 1 || STATE_IN || Bit 7..0: input value
+| 1 || Debounce || Bit 7..0: input value
 |}