Revision as of 19:51, 2 July 2013

Register Map

Read registers
Module Address	Register Address	Name	Data
0	MUX_IN	Bit 7..0: multiplexer address
'T'	1	STATE_IN	Bit 7..0: input value

Write registers
Register Address	Name	Data
0	MUX_OUT	Bit 7..0: multiplexer address
1	Debounce	Bit 7..0: input value

@@ Line 14: / Line 14: @@
 {| border="1" class="wikitable"
 |+ Write registers
-! Module Address !!  Register Address !! Name !! Data
+! Register Address !! Name !! Data
 |-
 ! 0
 | MUX_OUT || Bit 7..0: multiplexer address
 |-
-! 'T'
+! 1
-| 1 || Debounce || Bit 7..0: input value
+| Debounce || Bit 7..0: input value
 |}