Difference between revisions of "Digital input/output (DIO)"
(→Register Map) |
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| Line 29: | Line 29: | ||
! 2 | ! 2 | ||
| Mode | | Mode | ||
| − | | Bit 0: '1' 50 Ohm termination | + | |Bit 0: |
| − | + | '1' 50 Ohm termination | |
| + | '0' Open | ||
Bit 1: NIM/TTL | Bit 1: NIM/TTL | ||
| − | + | '1' NIM | |
| − | + | '0' TTL | |
| − | |||
| − | |||
|} | |} | ||
Revision as of 20:13, 2 July 2013
Register Map
Module Address: 'T' or Ox??
| Register Address | Name | Data |
|---|---|---|
| 0 | MUX_IN | Bit 7..0: multiplexer address |
| 1 | STATE_IN | Bit 7..0: input value |
| Register Address | Name | Data |
|---|---|---|
| 0 | MUX_OUT | Bit 7..0: multiplexer address |
| 1 | Debounce | Bit 7..0: input value |
| 2 | Mode | Bit 0:
'1' 50 Ohm termination '0' Open Bit 1: NIM/TTL '1' NIM '0' TTL |
