Difference between revisions of "Digital input/output (DIO)"

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'''Register Map'''
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= LogicPool (DIO) =
  
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Module Address: 'T' or Ox??
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This module supports several hardware expansions cards or submodules, no all functionalities are supported for all submodules.
  
 +
== Models ==
 +
 +
There is only one model for this module.
 +
 +
{{:CBUS_Address}}
 +
 +
 +
== Supported hardware ==
 +
 +
[[SU700]], [[SU701]], [[SU703]], [[SU704]], [[SU706]], [[SU707]]
 +
 +
== Register Map ==
 +
 +
Module Address: 'T' or Ox54
 +
 +
=== Read register ===
  
 
{| border="1" class="wikitable"
 
{| border="1" class="wikitable"
 
|+ Read registers
 
|+ Read registers
−
! Register Address !! Name !! Data
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! scope="col" | Register Address
 +
! scope="col" | Name  
 +
! scope="col" | Data
 
|-
 
|-
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! 0  
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| 0
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| MUX_IN || Bit 7..0: multiplexer address
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| MUX_IN
 +
| Bit 7..0: multiplexer address
 
|-
 
|-
−
! 1  
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| 1
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| STATE_IN || Bit 7..0: input value
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| STATE_IN
 +
| Bit 7..0: input value
 
|}
 
|}
  
  
 +
=== Write register ===
  
 
{| border="1" class="wikitable"
 
{| border="1" class="wikitable"
 
|+ Write registers
 
|+ Write registers
−
! Register Address !! Name !! Data
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! scope="col" | Register Address
 +
! scope="col" | Name  
 +
! scope="col" | Data
 
|-
 
|-
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! 0  
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|0  
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| MUX_OUT || Bit 7..0: multiplexer address
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|MUX_OUT  
 +
|Bit 7..0: multiplexer address
 
|-
 
|-
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! 1  
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|1
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| Debounce || Bit 7..0: input value
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|Debounce  
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|Bit 7..0: input value
 
|-
 
|-
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! 2  
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|2  
 
| Mode  
 
| Mode  
 
|Bit 0:  
 
|Bit 0:  
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  '0' Open
 
  '0' Open
 
Bit 1: NIM/TTL
 
Bit 1: NIM/TTL
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  '1' NIM
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'1' NIM
−
  '0' TTL    
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'0' TTL  
 
|}
 
|}
 +
 +
== LabVIEW Vi ==
  
  
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'''LabVIEW Vi'''
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[[File:DIOc.png]]
  
  
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Please obey termination rules as defined for the specific used hardware!
 
Please obey termination rules as defined for the specific used hardware!
  
−
Params:
+
The meaning of almost inputs and outputs of this Vi depends on the input "Function". The global inputs and outputs does not depend on the "function" input.
−
Mode: set according to used hardware module and level standards.
+
 
−
(SU704 supports switchable 50 Ohm termination!)  
+
=== Glogal Inputs ===
−
Debounce/ms: debounce delay for suppressing intermittent signals (1..255 ms). debounce=0 disables this function!
+
DIO#:  number of digital input/output to be accesed (1..255).
 +
 
 +
USB In: Handle to the LogicBox (create by open.vi), if not connected will take a global. parameter, this only works with one LogicBox at a time.
 +
 
 +
error in: error handling input
 +
 
 +
=== Global Outputs ===
 +
 
 +
USB out: Handle to the LogicBox.
 +
 
 +
error out: error handling output
 +
 
 +
=== Functions ===
 +
 
 +
  Connect: connects all in/outputs and sets all parameters
 +
          Inputs:
 +
          "Mode": select the DIO standar.
 +
          "DO"  : set the signal number which will drive the output, this signal can be set or clear
 +
                  manually using the module "B_S.vi" (Bool to Signal).
 +
          "DI"  : get the signal number of which drives this input.
 +
 
 +
  Set DO: set the signal number which will drive the output, this signal can be set or clear manually
 +
          using the module "B_S.vi" (Bool to Signal).
 +
          input: "DO" : signal number or value.
 +
 
 +
  Get DI: return the logic value of this input.
 +
          input: "DI": Logic value of this input.  
 +
 
 +
 
 +
 
 +
  Write Mode: Set the mode of the DIO.  
 +
              input: "Mode" : TTL/LVDS
 +
                              TTL 50 Ohm
 +
                              NIM Open
 +
                              NIM 50 Ohm
 +
 
 +
=== Example VIs ===
 +
 
 +
SU_DIO_Test.vi
  
−
Function:
 
−
Connect: connects all in/outputs and sets all parameters
 
−
Set DO: change input DO
 
−
Get DI: return output state at DI
 
−
Write Mode: load appr. mode
 
  
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DIO#: number of connector (must be unique!)
+
or for a specific extension board:
  
−
USB In and USB Out are related to the selected USB interface!
+
SU700 -> SU700_TTLIO_Test.vi
−
No connection uses a global parameter, set by OPEN.vi!
 
  
−
'''LabVIEW demos'''
+
SU707 -> SU707_Test.vi

Latest revision as of 09:49, 3 May 2016

LogicPool (DIO)

This module supports several hardware expansions cards or submodules, no all functionalities are supported for all submodules.

Models

There is only one model for this module.

CBUS Address


Supported hardware

SU700, SU701, SU703, SU704, SU706, SU707

Register Map

Module Address: 'T' or Ox54

Read register

Read registers
Register Address Name Data
0 MUX_IN Bit 7..0: multiplexer address
1 STATE_IN Bit 7..0: input value


Write register

Write registers
Register Address Name Data
0 MUX_OUT Bit 7..0: multiplexer address
1 Debounce Bit 7..0: input value
2 Mode Bit 0: 
'1' 50 Ohm termination
'0' Open

Bit 1: NIM/TTL 

'1' NIM
'0' TTL

LabVIEW Vi

DIOc.png


Digital Input/Output. Support: SU700, SU701, SU703, SU704, SU706, SU707 According to hardware this supports either TTL,, TTL_coax, NIM or DIFFERENTIAL I/Os. Each connector can be used as either an output (DO) or input (DI) or both. If used as an input, terminal DO (driving output) must not be connected, as this enables the output driver and would override any input signals.

Please obey termination rules as defined for the specific used hardware!

The meaning of almost inputs and outputs of this Vi depends on the input "Function". The global inputs and outputs does not depend on the "function" input.

Glogal Inputs

DIO#: number of digital input/output to be accesed (1..255).

USB In: Handle to the LogicBox (create by open.vi), if not connected will take a global. parameter, this only works with one LogicBox at a time.

error in: error handling input

Global Outputs

USB out: Handle to the LogicBox.

error out: error handling output

Functions

 Connect: connects all in/outputs and sets all parameters
          Inputs:
          "Mode": select the DIO standar.
          "DO"  : set the signal number which will drive the output, this signal can be set or clear
                  manually using the module "B_S.vi" (Bool to Signal).
          "DI"  : get the signal number of which drives this input. 

 Set DO: set the signal number which will drive the output, this signal can be set or clear manually
         using the module "B_S.vi" (Bool to Signal).
         input: "DO" : signal number or value. 

 Get DI: return the logic value of this input.
         input: "DI": Logic value of this input. 



 Write Mode: Set the mode of the DIO. 
             input: "Mode" : TTL/LVDS
                             TTL 50 Ohm
                             NIM Open
                             NIM 50 Ohm

Example VIs

SU_DIO_Test.vi


or for a specific extension board:

SU700 -> SU700_TTLIO_Test.vi

SU707 -> SU707_Test.vi

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