Difference between revisions of "SU700"

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Each channel can drive current up to 60 mA, in this way a 50 Ohm terminated cable can be use to avoid reflections. '''Meter la frecuencia máxima de conmutación'''. If the IO was configured as input a 50 Ohm resistor can be parallel connected to the input to avoid reflections, this can be done through a FPGA register.   
 
Each channel can drive current up to 60 mA, in this way a 50 Ohm terminated cable can be use to avoid reflections. '''Meter la frecuencia máxima de conmutación'''. If the IO was configured as input a 50 Ohm resistor can be parallel connected to the input to avoid reflections, this can be done through a FPGA register.   
  
 +
A pull up resistor can be populated in each channel if needed. In this function mode the 50 Ohm resistor must be not connected.
  
Bei hochohmigem Eingang kann alternativ über einen Pullupwiderstand von ca. 1kOhm jeder Eingang definiert auf High-Pegel gezogen werden und z.B. durch einen einfachen Schalter auf Low getrieben werden.
+
The submodule contains 5 LEDs, witch are direct connected to FPGA outputs, the LEDs can be configured through internal registers.
 
 
Zusätzlich sind 5 LEDs vorgesehen, die beliebig unabhängig angesteuert werden können.
 
 
 
  
 
= Revisions =
 
= Revisions =

Revision as of 14:07, 30 June 2013

This module has 5 independent 3.3V TTL input/output, each of this IOs is provided with a LEMO connector. The signals can be configured as input or output through a FPGA register. Each channel can drive current up to 60 mA, in this way a 50 Ohm terminated cable can be use to avoid reflections. Meter la frecuencia máxima de conmutación. If the IO was configured as input a 50 Ohm resistor can be parallel connected to the input to avoid reflections, this can be done through a FPGA register.

A pull up resistor can be populated in each channel if needed. In this function mode the 50 Ohm resistor must be not connected.

The submodule contains 5 LEDs, witch are direct connected to FPGA outputs, the LEDs can be configured through internal registers.

Revisions

Pinout

SU700 pin table (direction shown for the SU board)

 power    in            +5V  2    1 +5V             in     power
 LVTTL    in        DOUT<4>  4    3 DIN<5>          out    LVTTL
 LVTTL    in        DOUT<5>  6    5 DOEn<5>         in     LVTTL
 LVTTL    in        DOEn<4>  8    7 -               -      NC
 LVTTL    in        DOUT<3> 10    9 DIN<4>          out    LVTTL
 LVTTL    in        DOEn<3> 12   11 DIN<3>          out    LVTTL
 LVTTL    in        DOUT<2> 14   13 DIN<2>          out    LVTTL
 LVTTL    in        DOEn<2> 16   15 DIN<1>          out    LVTTL
 LVTTL    in        DOUT<1> 18   17 DOEn<1>         in     LVTTL
 LVTTL    in        LEDn<5> 20   19 LEDn<4>         in     LVTTL
 LVTTL    in        LEDn<3> 22   21 LEDn<2>         in     LVTTL
    NC     -              - 24   23 LEDn<1>         in     LVTTL
    NC     -              - 26   25 -               -      NC
    NC     -              - 28   27 -               -      NC
    NC     -              - 30   29 -               -      NC
    NC     -              - 32   31 -               -      NC
    NC     -              - 34   33 -               -      NC
 power    in            GND 36   35 GND             in     power


DIN<n> - Input channel n

DOUT<n> - Output channel n

DOEn<n> - Output enable (active low) channel n

LEDn<n> - LED n (active low)