Difference between revisions of "SU700"

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(Block Diagram)
(Front panel)
 
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= Front panel =  
 
= Front panel =  
  
== Version 0 ==
+
== Version 0,1,2 ==
  
 +
[[File:SU700_front_panel.png]]
  
 
= Back Connector =
 
= Back Connector =

Latest revision as of 10:25, 8 September 2014

Description

This module has 5 independent 3.3V TTL input/output, each of this IOs is provided with a LEMO connector. The signals can be configured as input or output through a FPGA register. Each channel can drive current up to 60 mA, in this way a 50 Ohm terminated cable can be use to avoid reflections. The máximal operation frequency is 200 MHz. If the IO was configured as input a 50 Ohm resistor can be parallel connected to the input to avoid reflections, this is a solder option.

A pull down resistor can be populated in each channel if needed. The version 1 and 2 have a pull up resistor too.

The submodule contains 5 LEDs, witch are direct connected to FPGA outputs, the LEDs can be configured through internal registers.

Block Diagram

Version 0

SU700-0 block diagram.png

Version 1,2

SU700-1 2 block diagram.png

Front panel

Version 0,1,2

SU700 front panel.png

Back Connector

Version 0,1 and 2

SU700 pin table (direction shown for the SU board)

 Type     Dir       Signal     Pin  Signal          Dir    Type     
 power    in            +5V  2    1 +5V             in     power
 LVTTL    in        DOUT<4>  4    3 DIN<5>          out    LVTTL
 LVTTL    in        DOUT<5>  6    5 DOEn<5>         in     LVTTL
 LVTTL    in        DOEn<4>  8    7 -               -      NC
 LVTTL    in        DOUT<3> 10    9 DIN<4>          out    LVTTL
 LVTTL    in        DOEn<3> 12   11 DIN<3>          out    LVTTL
 LVTTL    in        DOUT<2> 14   13 DIN<2>          out    LVTTL
 LVTTL    in        DOEn<2> 16   15 DIN<1>          out    LVTTL
 LVTTL    in        DOUT<1> 18   17 DOEn<1>         in     LVTTL
 LVTTL    in        LEDn<5> 20   19 LEDn<4>         in     LVTTL
 LVTTL    in        LEDn<3> 22   21 LEDn<2>         in     LVTTL
    NC     -              - 24   23 LEDn<1>         in     LVTTL
    NC     -              - 26   25 -               -      NC
    NC     -              - 28   27 -               -      NC
    NC     -              - 30   29 -               -      NC
    NC     -              - 32   31 -               -      NC
    NC     -              - 34   33 -               -      NC
 power    in            GND 36   35 GND             in     power


DIN<n> - Input channel n

DOUT<n> - Output channel n

DOEn<n> - Output enable (active low) channel n

LEDn<n> - LED n (active low)

Power consumption

Version 0

+5V -> XX mA -5V -> XX mA

Measurement

Version 0

Compatibility

This module is compatible with all base boards


LogicPool (DIO)

This module supports several hardware expansions cards or submodules, no all functionalities are supported for all submodules.

Models

There is only one model for this module.

CBUS Address


Supported hardware

SU700, SU701, SU703, SU704, SU706, SU707

Register Map

Module Address: 'T' or Ox54

Read register

Read registers
Register Address Name Data
0 MUX_IN Bit 7..0: multiplexer address
1 STATE_IN Bit 7..0: input value


Write register

Write registers
Register Address Name Data
0 MUX_OUT Bit 7..0: multiplexer address
1 Debounce Bit 7..0: input value
2 Mode Bit 0:
'1' 50 Ohm termination
'0' Open

Bit 1: NIM/TTL

'1' NIM
'0' TTL   

LabVIEW Vi

DIOc.png


Digital Input/Output. Support: SU700, SU701, SU703, SU704, SU706, SU707 According to hardware this supports either TTL,, TTL_coax, NIM or DIFFERENTIAL I/Os. Each connector can be used as either an output (DO) or input (DI) or both. If used as an input, terminal DO (driving output) must not be connected, as this enables the output driver and would override any input signals.

Please obey termination rules as defined for the specific used hardware!

The meaning of almost inputs and outputs of this Vi depends on the input "Function". The global inputs and outputs does not depend on the "function" input.

Glogal Inputs

DIO#: number of digital input/output to be accesed (1..255).

USB In: Handle to the LogicBox (create by open.vi), if not connected will take a global. parameter, this only works with one LogicBox at a time.

error in: error handling input

Global Outputs

USB out: Handle to the LogicBox.

error out: error handling output

Functions

 Connect: connects all in/outputs and sets all parameters
          Inputs:
          "Mode": select the DIO standar.
          "DO"  : set the signal number which will drive the output, this signal can be set or clear
                  manually using the module "B_S.vi" (Bool to Signal).
          "DI"  : get the signal number of which drives this input. 
 Set DO: set the signal number which will drive the output, this signal can be set or clear manually
         using the module "B_S.vi" (Bool to Signal).
         input: "DO" : signal number or value. 
 Get DI: return the logic value of this input.
         input: "DI": Logic value of this input. 


 Write Mode: Set the mode of the DIO. 
             input: "Mode" : TTL/LVDS
                             TTL 50 Ohm
                             NIM Open
                             NIM 50 Ohm

Example VIs

SU_DIO_Test.vi


or for a specific extension board:

SU700 -> SU700_TTLIO_Test.vi

SU707 -> SU707_Test.vi