Difference between revisions of "SU706"
(Created page with "SU706 pin table (direction shown for the SU board!) modification 1 power in +5V 2 1 +5V in power LVTTL in RESET 4 3 CLK...") |
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| + | = Description = | ||
| + | |||
| + | = Block Diagram = | ||
| + | |||
| + | == Version 0 == | ||
| + | |||
| + | |||
| + | |||
| + | = Front panel = | ||
| + | |||
| + | == Version 0 == | ||
| + | |||
| + | {| border="1" class="wikitable" | ||
| + | |+ Front panel connectors and controls | ||
| + | ! scope="col" | Pos (top view) | ||
| + | ! scope="col" | Name | ||
| + | ! scope="col" | Type | ||
| + | ! scope="col" | Qty. | ||
| + | ! scope="col" | Dir. | ||
| + | ! scope="col" | Function | ||
| + | |- | ||
| + | |1 LEFT/RIGHT/MIDDLE | ||
| + | |Analog input | ||
| + | |LEMO connector | ||
| + | |1x | ||
| + | |input | ||
| + | |Detector input | ||
| + | |- | ||
| + | |2 LEFT/RIGHT/MIDDLE | ||
| + | |DIO | ||
| + | |LEMO connector | ||
| + | |1x | ||
| + | |input/output | ||
| + | |Digital input/output (LVTTL) | ||
| + | |} | ||
| + | |||
| + | = Back Connector = | ||
| + | |||
| + | == Version 0 == | ||
| + | |||
| + | SU7XX pin table (direction shown for the SU board!) | ||
| + | |||
| + | |||
| + | power in +5V 2 1 +5V in power | ||
| + | NC - - 4 3 - - NC | ||
| + | NC - - 6 5 - - NC | ||
| + | NC - - 8 7 - - NC | ||
| + | NC - - 10 9 - - NC | ||
| + | NC - - 12 11 - - NC | ||
| + | NC - - 14 13 - - NC | ||
| + | NC - - 16 15 - - NC | ||
| + | NC - - 18 17 - - NC | ||
| + | NC - - 20 19 - - NC | ||
| + | LVTTL out SDIN 22 21 - - NC | ||
| + | LVTTL in SCLK 24 23 - - NC | ||
| + | LVTTL in CSn 26 25 - - NC | ||
| + | LVTTL in SDOUT 28 27 - - NC | ||
| + | NC - - 30 29 - - NC | ||
| + | NC - - 32 31 - - NC | ||
| + | NC - - 34 33 - - NC | ||
| + | power in GND 36 35 GND in power | ||
| + | |||
| + | = Power consumption = | ||
| + | |||
| + | == Version 0 == | ||
| + | |||
| + | +5V -> XX mA | ||
| + | -5V -> XX mA | ||
| + | |||
| + | = Measurement = | ||
| + | |||
| + | == Version 0 == | ||
| + | |||
| + | = Compatibility = | ||
| + | |||
| + | This module is compatible with all base boards | ||
| + | |||
| + | |||
| + | |||
| + | |||
| + | |||
| + | |||
SU706 pin table (direction shown for the SU board!) | SU706 pin table (direction shown for the SU board!) | ||
Revision as of 10:59, 12 September 2014
Contents
Description
Block Diagram
Version 0
Front panel
Version 0
| Pos (top view) | Name | Type | Qty. | Dir. | Function |
|---|---|---|---|---|---|
| 1 LEFT/RIGHT/MIDDLE | Analog input | LEMO connector | 1x | input | Detector input |
| 2 LEFT/RIGHT/MIDDLE | DIO | LEMO connector | 1x | input/output | Digital input/output (LVTTL) |
Back Connector
Version 0
SU7XX pin table (direction shown for the SU board!)
power in +5V 2 1 +5V in power
NC - - 4 3 - - NC
NC - - 6 5 - - NC
NC - - 8 7 - - NC
NC - - 10 9 - - NC
NC - - 12 11 - - NC
NC - - 14 13 - - NC
NC - - 16 15 - - NC
NC - - 18 17 - - NC
NC - - 20 19 - - NC
LVTTL out SDIN 22 21 - - NC
LVTTL in SCLK 24 23 - - NC
LVTTL in CSn 26 25 - - NC
LVTTL in SDOUT 28 27 - - NC
NC - - 30 29 - - NC
NC - - 32 31 - - NC
NC - - 34 33 - - NC
power in GND 36 35 GND in power
Power consumption
Version 0
+5V -> XX mA -5V -> XX mA
Measurement
Version 0
Compatibility
This module is compatible with all base boards
SU706 pin table (direction shown for the SU board!)
modification 1
power in +5V 2 1 +5V in power
LVTTL in RESET 4 3 CLKout out LVTTL
LVTTL out DATA<0> 6 5 DATA<1> out LVTTL
LVTTL out DATA<2> 8 7 DATA<3> out LVTTL
LVTTL out DATA<4> 10 9 DATA<5> out LVTTL
LVTTL out DATA<6> 12 11 DATA<7> out LVTTL
LVTTL out DATA<8> 14 13 DATA<9> out LVTTL
LVTTL out DATA<10> 16 15 DATA<11> out LVTTL
LVTTL out DATA<12> 18 17 DATA<13> out LVTTL
NC - - 20 19 SCLKn in LVTTL
LVTTL in SDATA 22 21 SEn in LVTTL
LVTTL in CLKp 24 23 DIO1OUT in LVTTL
LVTTL in DIO2OUT 26 25 DIO2OEn in LVTTL
LVTTL in DIO1OEn 28 27 DIO2IN out LVTTL
NC - - 30 29 DIO1IN out LVTTL
NC - - 32 31 CLKn in LVTTL
NC - - 34 33 - - NC
power in GND 36 35 GND in power
modification 2
power in +5V 2 1 +5V in power
LVTTL in RESET 4 3 CLKout out LVTTL
LVTTL out DATA<0> 6 5 DATA<1> out LVTTL
LVTTL out DATA<2> 8 7 DATA<3> out LVTTL
LVTTL out DATA<4> 10 9 DATA<5> out LVTTL
LVTTL out DATA<6> 12 11 DATA<7> out LVTTL
LVTTL out DATA<8> 14 13 DATA<9> out LVTTL
LVTTL out DATA<10> 16 15 DATA<11> out LVTTL
LVTTL out DATA<12> 18 17 DATA<13> out LVTTL
LVTTL out OVR 20 19 SCLKn in LVTTL
LVTTL in SDATA 22 21 SEn in LVTTL
LVTTL in CLKn 24 23 CLKp in LVTTL
LVTTL in DIO2OUT 26 25 DIO2OEn in LVTTL
LVTTL in DIO1OEn 28 27 DIO2IN out LVTTL
LVTTL in DIO1OUT 30 29 DIO1IN out LVTTL
LVTTL in LED1n 32 31 LED2n in LVTTL
NC - - 34 33 - - NC
power in GND 36 35 GND in power
