Difference between revisions of "LogicPool"
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Revision as of 06:59, 9 June 2016
C++
LabVIEW
LogicPool modules
Digital output high voltage (DO_HV)
Charge to digital converter (QDC)
Time to digital converter (TDC)
Templates
C++ SDK
LabVIEW versions
The LogicBox can be controlled with the help of LabVIEW. The current release is the 4.1 and uses LabVIEW for a self-installation. You can download the old versions as well. If you are working with the DL706 and DL709 please update the USB chip to the latest version Firmware update (only DL706 and DL709). This version works only with the Cypress firmware 1.5 or higher!!!!
Current release 4.1.8 (Installer)
Current release 4.1.8 (Zip file)
Version 4.1.8 (10.05.2016)
Added error processing in all LogicPool VIs
Added support for SU753, digital output high voltage (DO_HV)
LogicBox.dll version 1.9 -> SU753 support
Version 4.1.7 (9.06.2015)
SU706_ADCF_Test.vi: bug fixed, now use the fifo size in all acquisition modes, before it has only worked with
4096-words FIFOs
LogicBox.dll version 1.8 -> Added CBUS debug output for FTDI devices
Version 4.1.6 (19.02.2015)
the USB dll functions are no more in a lvlib library to avoid problems with bigger projects
get Dll version.vi: new Vi to get the dll version
_SETUP_advanced.vi: now shows the dll version number
LogicBox.dll version 1.5
If a FTDI is detected, the right Product string will be shown.
Version 4.1.5 (12.02.2015)
get Devices.vi: bug fixed, only the first LogicBox was shown
4ByteSVNID.vi: if no svn id in FPGA design shows a warning message
_SETUP_advanced.vi new Vi added, shows all LogicBoxes im System
LogicBox.dll version 1.4
FTDI and FX2 are working together now, if a FTDI was present the FX2 could not be opened.
define changed WIN32 for WINDOWS, WIN64 define added
Version 4.1.4 (28.01.2015)
Module.vi improved: now you can read the VHDL version of each hardware module to check the compatibility.
TDC.vi improved: now the user can set a delay between the gate and the inputs, so the user can use the coincidence of two
inputs to generate the gate and the time stamp of this signals will be saved too. The new VI function
"set data delay" check the TDC hardware version to prove if this feature is available.
LP_TDC_1_Test.vi: this example is now working with the version 4.1.4.
Version 4.1.3 (03.11.2014)
Bug fixed: FADC.vi the funcion read data reads data only if the data to be read is bigger than 0. Otherwise the
FPGA state machine does not work any more.....To be fixed in VHDL code!.
Try command 45 61 01 00 53 02 46 00 00 6C
E a 1 0 S 2 F 0 l
E a 1 0 -> Set address(3Bytes)'a' FADC modul '1' register '0'
S 2 -> Set address(1 Byte) register '2' ADC data out register
F 0 -> Set FIFO counter to zero
l -> read 32-bits words zero times because F = 0
LogicBox.dll version 1.3 memory leaks fixed and error processing improved
Version 4.1.2 (29.10.2014)
Bug fixed: new FX3 engine working with more than one LogicBox at the same time.
Bug fixed: the LogicPool.dll check now if the LogicBox was not closed before it will be opened again.
Bug fixed: FADC.vi default function must be always "connect"
LogicBox.dll version 1.2
Version 4.1.1 (13.10.2014)
This version is only working with the version 1.5 or higher of the USB firmware (only DL706 and DL709)
This version is compatible with LabVIEW version 8.2 or higher
The LogicBox.dll (version 1.1) is working with the new FX3 acquisition engine.
Bug fixed in close.vi wrong connection, failed to close the LogicBox.
Bug fixed with version 8.0. of LabVIEW.
Bug fixed No need of restart LabVIEW if the LogicBox was not correct closed.
Save setup function is not supported in this version.
LogicBox.dll version 1.1
