Difference between revisions of "SU707"
| Line 22: | Line 22: | ||
power in GND 36 35 GND in power | power in GND 36 35 GND in power | ||
| − | Version 1 | + | Version 1 |
| + | |||
| + | power in +5V 2 1 +5V in power | ||
| + | LVTTL in LVDS_O<1> 4 3 EN_O<1> in LVTTL | ||
| + | LVTTL in LVDS_O<2> 6 5 EN_O<2> in LVTTL | ||
| + | LVTTL in LVDS_O<3> 8 7 - - NC | ||
| + | LVTTL in LVDS_O<4> 10 9 - - NC | ||
| + | LVTTL out LVDS_I<1> 12 11 EN_I<1> in LVTTL | ||
| + | LVTTL out LVDS_I<2> 14 13 EN_I<2> in LVTTL | ||
| + | LVTTL out LVDS_I<3> 16 15 LED<1> in LVTTL | ||
| + | LVTTL out LVDS_I<4> 18 17 LED<2> in LVTTL | ||
| + | LVTTL in LVDS_O<5> 20 19 EN_O<3> in LVTTL | ||
| + | LVTTL in LVDS_O<6> 22 21 EN_O<4> in LVTTL | ||
| + | LVTTL in LVDS_O<7> 24 23 - - NC | ||
| + | LVTTL in LVDS_O<8> 26 25 - - NC | ||
| + | LVTTL out LVDS_I<5> 28 27 EN_I<3> in LVTTL | ||
| + | LVTTL out LVDS_I<6> 30 29 EN_I<4> in LVTTL | ||
| + | LVTTL out LVDS_I<7> 32 31 - - NC | ||
| + | LVTTL out LVDS_I<8> 34 33 - - NC | ||
| + | power in GND 36 35 GND in power | ||
| + | |||
| + | Version 2 | ||
power in +5V 2 1 +5V in power | power in +5V 2 1 +5V in power | ||
Revision as of 12:57, 7 May 2014
SU707 pin table (direction shown for the SU board!)
Version 0
power in +5V 2 1 +5V in power
LVTTL out LVDS_I<1> 4 3 LVDS_I<2> out LVTTL
LVTTL in LVDS_O<1> 6 5 LVDS_O<2> in LVTTL
LVTTL in LVDS_O<3> 8 7 LVDS_O<4> in LVTTL
LVTTL out LVDS_I<3> 10 9 LVDS_I<4> out LVTTL
LVTTL out LVDS_I<5> 12 11 LVDS_I<6> out LVTTL
LVTTL in LVDS_O<5> 14 13 LVDS_O<6> in LVTTL
LVTTL in LVDS_O<7> 16 15 LVDS_O<8> in LVTTL
LVTTL out LVDS_I<7> 18 17 LVDS_I<8> out LVTTL
LVTTL in EN_O<2> 20 19 EN_I<2> in LVTTL
LVTTL in EN_O<1> 22 21 EN_I<1> in LVTTL
NC - - 24 23 - - NC
NC - - 26 25 - - NC
NC - - 28 27 - - NC
NC - - 30 29 - - NC
NC - - 32 31 - - NC
NC - - 34 33 - - NC
power in GND 36 35 GND in power
Version 1
power in +5V 2 1 +5V in power LVTTL in LVDS_O<1> 4 3 EN_O<1> in LVTTL LVTTL in LVDS_O<2> 6 5 EN_O<2> in LVTTL LVTTL in LVDS_O<3> 8 7 - - NC LVTTL in LVDS_O<4> 10 9 - - NC LVTTL out LVDS_I<1> 12 11 EN_I<1> in LVTTL LVTTL out LVDS_I<2> 14 13 EN_I<2> in LVTTL LVTTL out LVDS_I<3> 16 15 LED<1> in LVTTL LVTTL out LVDS_I<4> 18 17 LED<2> in LVTTL LVTTL in LVDS_O<5> 20 19 EN_O<3> in LVTTL LVTTL in LVDS_O<6> 22 21 EN_O<4> in LVTTL LVTTL in LVDS_O<7> 24 23 - - NC LVTTL in LVDS_O<8> 26 25 - - NC LVTTL out LVDS_I<5> 28 27 EN_I<3> in LVTTL LVTTL out LVDS_I<6> 30 29 EN_I<4> in LVTTL LVTTL out LVDS_I<7> 32 31 - - NC LVTTL out LVDS_I<8> 34 33 - - NC power in GND 36 35 GND in power
Version 2
power in +5V 2 1 +5V in power LVTTL in LVDS_O<1> 4 3 EN_O<1> in LVTTL LVTTL in LVDS_O<2> 6 5 EN_O<2> in LVTTL LVTTL in LVDS_O<3> 8 7 - - NC LVTTL in LVDS_O<4> 10 9 - - NC LVTTL out LVDS_I<1> 12 11 EN_I<1> in LVTTL LVTTL out LVDS_I<2> 14 13 EN_I<2> in LVTTL LVTTL out LVDS_I<3> 16 15 LED<1> in LVTTL LVTTL out LVDS_I<4> 18 17 LED<2> in LVTTL LVTTL in LVDS_O<5> 20 19 EN_O<3> in LVTTL LVTTL in LVDS_O<6> 22 21 EN_O<4> in LVTTL LVTTL in LVDS_O<7> 24 23 - - NC LVTTL in LVDS_O<8> 26 25 - - NC LVTTL out LVDS_I<5> 28 27 EN_I<3> in LVTTL LVTTL out LVDS_I<6> 30 29 EN_I<4> in LVTTL LVTTL out LVDS_I<7> 32 31 - - NC LVTTL out LVDS_I<8> 34 33 - - NC power in GND 36 35 GND in power
