SU751

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SU751 can accomodate 5 small sub-modules (here numbered from 1 to 5), each connected thorugh 3 I/Os to the SU751 connector and so to the FPGA.

Pin table (direction shown for the SU board!)

power    in            +5V  2    1 +5V             in     power
LVTTL    in        OUTP<5>  4    3 INP<5>          out    LVTTL
LVTTL    in        OE_n<5>  6    5 INJ<5>
  GND    in            GND  8    7 LED_n<5>        in     LVTTL
LVTTL    in        OUTP<4> 10    9 INTTL<4>        out    LVTTL
LVTTL    in        OE_n<4> 12   11 INJ<4>
  GND    in            GND 14   13 LED_n<4>        in     LVTTL
LVTTL    in        OUTP<3> 16   15 INTTL<3>        out    LVTTL
LVTTL    in        OE_n<3> 18   17 INJ<3>
  GND    in            GND 20   19 LED_n<3>        in     LVTTL
LVTTL    in        OUTP<2> 22   21 INTTL<2>        out    LVTTL
LVTTL    in        OE_n<2> 24   23 INJ<2>
  GND    in            GND 26   25 LED_n<2>        in     LVTTL
LVTTL    in        OUTP<1> 28   27 INTTL<1>        out    LVTTL
LVTTL    in        OE_n<1> 30   29 INJ<1>
  GND    in            GND 32   31 LED_n<1>        in     LVTTL
   NC     -              - 34   33 GND             -      GND
power    in            GND 36   35 GND             in     power

Note: 1) INJ<1..5> can be jumpered on SU751 to INP<1..5> in order to be fullly compatible to SU704. Normally not necessary. 2)The additional GND pins can be connector in the FPGA as outputs driving 0. Be carefull not to drive 1! 3) The LEDs are active low, like in SU704.

List of the sub-modules for SU751

Submodules for SU751
Name Short description Isolated? Used power drive 50-Ohm Pin INP Pin OUTP Pin OE_n LEMO Comment
A-0 Comparator no -5V,+5V,+3.3V --- Comparator Output - - Analog In (AIN) INP=1 when AIN > threshold (set by resistors), else 0
A-1 Comparator with DAC no -5V,+5V,+3.3V --- Comparator Output SDA SCL Analog In (AIN) INP=1 when AIN > threshold (set by 12-bit DAC MCP4726, options: 0..4.095V, +/-4.095V, +/-2.047V), else 0
A-1 12-bit DAC no -5V,+5V,+3.3V ??? - SDA SCL Analog Out (AOUT) AOUT is DAC (MCP4726) output, options: 0..4.095V, +/-4.095V, +/-2.047V
B NIM input no -5V,+3.3V --- converted NIM in - - NIM in, 50 Ohm INP=1 when NIM input < -0.3V, else 0
C NIM output no -5V/40mA,+5V/4mA Yes - NIM output state - NIM output OUTP=1 => LEMO sinks 16 mA, OUTP=0 => LEMO output off
D LVTTL in/out no +3.3V ??? Input from LEMO Output to LEMO Output enable (active low) to LEMO LVTTL in/out, optional pull-up and termination LEMO=OUTP when OE_n=0 else tri-stated when OE_n=1; INP=LEMO
E ECL/LVDS in no -5V,+3.3V --- converted input from LEMO - - ECL or LVDS input with optional proper termination uses differential LEMO!
F LVTTL in/out yes +3.3V Yes Input from LEMO Output to LEMO Output enable (active low) to LEMO LVTTL in/out, optional pull-up and termination LEMO=OUTP when OE_n=0 else tri-stated when OE_n=1; INP=LEMO
G LVTTL in yes +5,+3.3V --- inverted input from LEMO - - input to optocoupler INP=1 when current to LEMO in < 1mA, INP=0 when current to LEMO in > 1.6 mA
H LVDS in/out no +3.3V 100 converted input from LEMO Output to LEMO Output enable (active low) LVDS input/output with proper termination uses differential LEMO!
I ADC yes +5V,+3.3V ??? SPI SDATA SPI SCLK SPI CSn Analog input ADCS7476, 12-bit, 1MS/s, VREF 4.096V, 3.3, 3.0, Range 0..VREF, 0..VREF/2, +/-VREF, +/-VREF/2, 0..2*VREF, +/-2*VREF
S DDS yes +5V,+3.3V total 70 mA ??? ? ? ? Analog Output/Sync DUAL! AD5932, 10-bit, 50MS/s, with Amplifier +/-1V on 50 Ohm